高性能嵌入式计算

高性能嵌入式计算

(美) 沃尔夫 (Wolf,M.) , 著

出版社:机械工业出版社

年代:2015

定价:79.0

书籍简介:

本书采用一种独特的量化方法来论述现代嵌入式计算系统的设计,书中根据性能、功率和能量消耗以及成本应达到的量化目标描述了在设计中亟待解决的问题。贯穿全书的实际应用使得本书对专业人员、研究人员和学生来说都是及时且非常有价值的资源。

作者介绍:

玛里琳·沃尔夫(Marilyn Wolf) 佐治亚理工学院教授,佐治亚研究联合会优秀学者。她分别于1980年、1981年和1984年获得斯坦福大学电子工程学士学位、硕士学位和博士学位。1984年至1989年任职于贝尔实验室,1989年至2007年执教于普林斯顿大学。她是IEEE和ACM会士、IEEE计算机协会核心成员以及ASEE和SPIE成员。她于2003年获得ASEE Frederick E. Terman奖,于2006年获得IEEE电路与系统教育奖。她的研究兴趣主要包括嵌入式计算、嵌入式视频和计算机视觉、VLSI系统。

书籍目录:

Preface to the Second Edition

Preface to the First Edition

Acknowledgments

CHAPTER l

Embedded Computing

1.1. The landscape of high-performance embedded

computing .

1.2. Cyber-physical systems and embedded computing.

1.2.1. Vehicle control and operation

1.2.2. Medical devices and systems.

1.2.4. Radio and networking.

1.2.5. Multimedia.

1.3. Design methodologies .

1.3.1. Why use design methodologies?

1.3.2. Design goals .

1.3.3. Basic design methodologies

1.3.4. Embedded system design flows

1.3.5. Standards-based design methodologies

1.3.6. Design verification and validation

1.3.7. A methodology of methodologies

1.3.8. Joint algorithm and architecture development

1.4.1. Why study models of computation?.

1.4.3. Stream-oriented models

1.4.4. Representations of state and control.

1.4.5. Parallelism and communication

1.4.6. Sources and uses of parallelism

1.5. Reliability, safety, and security. . .

1.5.1. Why reliable embedded systems?.

1.5.2. Fundamentals of reliable system design.

1.5.3. Novel attacks and countermeasures

1.6. Consumer electronics architectures.

1.6.2.WiFi

?CHAPTER 2

1.6.3. Networked consumer devices

1.6.4. High-level services

1.7. Summary and a look ahead.

What we learned

Further reading

Lab exercises .

CPUS

2.2. Comparing processors. :::::::::::::I:i

2.2.3. Embedded vs. general-purpose processors.

2.3. RISC processors and digital signal processors

2.3.1. RISC processors “{

2.3.2. Digital signal processors i

2.4. Parallel execution mechanisms.

2.4.1. Very long instruction word processors . :

2.4.2. Superscalar processors

2.4.3. SIMD and vector processors.

2.4.4. Thread-levelparallelism

2.4.5. GPUs

2.4.6. Processor resource utilization.

2.5. Variable-performance CPU architectures ,.

2.5.1. Dynamic voltage and frequency scaling.

2.5.2. Reliability and error-aware computing.

2.6. Ptocessor memory hierarchy.

2.6.1. Memory component models .

2.6.4. Scratch pad memory

2.7. Encoding and security

2.7.1. Code compression

2.7.3. Low-power bus encoding

2.8.2. Direct execution .

2.8.3. Microarchitecture-modeling simulators

?CHAPTER 3

2.8.4. Power and thermal simulation and modeling

2.9. Automated CPU design.

2.9.1. Configurable processors

2.9.2. Instruction set synthesis

2.10. Summary.

What we learned

Further reading :.

Lab exercises .

ProgramS

3.1.Introduction

3.2. Code generation and back-end compilation

3.2.1. Models for instructions .

3.2.2. Register allocation.

3.2.3. Instruction selection and scheduling.

3.2.5. Programming environments

3.3. Memory-oriented optimizations

3.3.1. Loop transformations

3.3.2. Global optimizations.

3.3.3. Buffer, data transfer, and storage management

3.3.4. Cache- and scratch pad-oriented

3.3.5. Main memory-oriented optimizations

3.4. Program performance analysis

3.5. Models of computation and programming

3.5.1. Interrupt-oriented languages .

3.5.2. Data flow languages

3.5.3. Control-oriented languages

3.5.4. Java

3.5.5. Heterogeneous models of computation .

Lab exercises .

?CHAPTER 4 Processes and Operating Systems.

4.1. Intrc)dLicti

4.2. Rcal-tiI11c pi‘‘)ce~N schecluling

4.2.1. Prclinlinarie~

4.2.2. Rcal-ti111c、cllcLlulillg Lllg()lillll11、

4.2.3. Multi-crilicalily~cllccluling. .

4.2.4. Scheduling l'or dynamic x【)ltagc all Ll rrequency

4.2.5. Pcilbrma]icc esliniati()11 .

4.3. I.angumgcs andschcclulin.

4.4. Opcrating~ysfem【le~ign

4.4.1. Mc ry l11anagcmcnt in cnlhc Ll(lccl operating

4.4.2. Siructurc()I' a rcal-ti

4.4.3. Opcratillg systen vcrhcacl .

4.4.4. Support for schcduling.

4.4.5. Intcrprc)ccss c: nuIlica“ion l11cchalli、ms.

4.4.6. Pc)we~

4.4.7. File systcms in cmheclclcd dcviccs.

4.5. VcriIic:Itic,n

Furthcr readillg

Queslion、

IJab excrcii

CHAPTER 5

M ultiprocessor Architectures ._ - _ _.-.,

5.1. IntrodLicti【)【1 .

5.2. Why embccldccl multiproccssors? .

5.2.1. Rcquircmenti, on cmhcctdcd systcins.

5.2.2. PeI'1i)1·111:lIlce and cllcl1掣y

5.2.3. Spccializaiion ancl l¨ultiproccN~【)rs.

5.2.4. Flcxihiiily and cllicicllcv

5.3. Multipn)cchsor dcsign Icchiiiq LIe、. . .

5.3.1. Multiproccssor dcsign iiicilic)dc)l‘)gics .

5.3.2. Mulciprocesm)r moclcling zind ,i lalion.

5.4. MultipI‘()ceswr architccturch

5.5. Prc,cessing clcincnts

5.6. Intercc)iincction network\

5.6.2. Nciwc)rk topo~gics .

5.6.3. I《)Ll[in!:lIl(1 ll¨w c Irc)

5.6.4. Nctworkh-c)li-chil)、

?CHAPTER 6

CHAPTER 7

5.7. Memory systems

5.8. Physically distributed systems and networks

5.8.2. Time-triggered architecture.

5.9. Multiprocessor design methodologies

What we have learned .

Questions

Multiprocessor Software ¨

6.2. What is different about embedded multiprocessor

6.3. Real-time multiprocessor operating systems .

6.3.2. Multiprocessor scheduling

6.3.3. Scheduling with dynamic tasks ,,.

6.4. Services and middleware for embedded

multiprocessors

6.4.1. Standards-based services

6.4.2. System-on-chip services

6.5. Design verification

What we have learned

System-Level Design and Hardware/Software

7.2. Performance estimation

7.2.1. High-level synthesis .

7.2.2. Accelerator estimation

?CHAPTER 8

(JlOi,sary .

Refercnccs

7.3. Hardware/softwarc c‘)一i,ynthcSiS algoriiiil11s

7.3.2. Platform rcprchentati(1n~

7.3.3. Tcmplatc-clrivcn syiithcsis alg()rithn" .

7.3.4. Co-synthcsis or gcncral Inultipr‘)cessors

7.3.5. Multi一()hjcctive optimization

7.3.7. Mcmory systcms

7.3.8. Co-synthcsis 11)r iec()nfigurahic hystems

7.4. Electronic syi,tcm-lcvcl dcsigI1

7.5. Thcrmal-aware dCsign .

7.6. Reliability .

7.7. Syi,tem-Icvcl simulation .

What wc. havc lcarncd .

Furthcr rcacling .

Lab excrciscs

Cyber-Physical Systems .

8.1. IntrodLicti()11.

8.2.C【)nIrol thc()ry zmcl hyStC nlS.

8.3. Conll’()l/cmnpuling co-clcsi:Jn

8.4. Netxvc)rke~

8.5. Dcsign mcihociologie~ .

8.5.1. Moclcl-basccl design

What wc havc learned .

Furthcr rcading

I_zih cxcrciscs .

内容摘要:

《高性能嵌入式计算(英文版·第2版)》第2版经过全面更新和扩展,涵盖了现代高性能嵌入式系统设计领域使用的广泛技术。现在智能手机、飞机、汽车、电力设备、医疗设备等许多应用都在使用嵌入式多处理器,所以让系统设计人员理解这些复杂技术必须依赖越来越复杂的硬件、软件和设计方法是非常重要的。
  Wolf教授采用一种独特的量化方法来论述现代嵌入式计算系统的设计,解释如何定义和实现性能、功耗和成本的量化目标。贯穿全书的实际应用使得本书对专业人员、研究人员和学生来说都是及时且非常有价值的资源。
  第2版主要特点:
  包含全新的一章,讨论信息物理系统(CPS)——将控制理论和嵌入式计算相结合的新兴智能系统。
  讨论嵌入式计算的高级主题,包括针对嵌入式系统的热感知设计、可配置处理器、实时约束和功耗的软件优化、异构多处理器和嵌入式中间件。
  深入讨论网络、可重配置系统、软硬件协同设计、安全和程序分析。

编辑推荐:

讨论信息物理系统(CPS)——将控制理论和嵌入式计算相结合的新兴智能系统。
  讨论嵌入式计算的高级主题,包括针对嵌入式系统的热感知设计、可配置处理器、实时约束和功耗的软件优化、异构多处理器和嵌入式中间件。
  深入讨论网络、可重配置系统、软硬件协同设计、安全和程序分析。

书籍规格:

书籍详细信息
书名高性能嵌入式计算站内查询相似图书
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9787111499305
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出版地北京出版单位机械工业出版社
版次1版印次1
定价(元)79.0语种英文
尺寸19 × 24装帧平装
页数 484 印数 3000

书籍信息归属:

高性能嵌入式计算是机械工业出版社于2015.4出版的中图分类号为 TP360.21 的主题关于 微型计算机-系统设计-英文 的书籍。